Searched hist:e23d4192bf9b612bce5b24f22719fd3cc6edaa69 (Results 1 – 3 of 3) sorted by path
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| H A D | irqdomain_defs.h | diff e23d4192bf9b612bce5b24f22719fd3cc6edaa69 Fri Nov 25 00:26:28 CET 2022 Thomas Gleixner <tglx@linutronix.de> genirq/msi: Provide constants for PCI/IMS support
Provide the necessary constants for PCI/IMS support:
- A new bus token for MSI irqdomain identification
- A MSI feature flag for the MSI irqdomains to signal support
- A secondary domain id
The latter expands the device internal domain pointer storage array from 1
to 2 entries. That extra pointer is mostly unused today, but the
alternative solutions would not be free either and would introduce more
complexity all over the place. Trade the 8bytes for simplicity.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221124232326.846169830@linutronix.de
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| H A D | msi.h | diff e23d4192bf9b612bce5b24f22719fd3cc6edaa69 Fri Nov 25 00:26:28 CET 2022 Thomas Gleixner <tglx@linutronix.de> genirq/msi: Provide constants for PCI/IMS support
Provide the necessary constants for PCI/IMS support:
- A new bus token for MSI irqdomain identification
- A MSI feature flag for the MSI irqdomains to signal support
- A secondary domain id
The latter expands the device internal domain pointer storage array from 1
to 2 entries. That extra pointer is mostly unused today, but the
alternative solutions would not be free either and would introduce more
complexity all over the place. Trade the 8bytes for simplicity.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221124232326.846169830@linutronix.de
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| H A D | msi_api.h | diff e23d4192bf9b612bce5b24f22719fd3cc6edaa69 Fri Nov 25 00:26:28 CET 2022 Thomas Gleixner <tglx@linutronix.de> genirq/msi: Provide constants for PCI/IMS support
Provide the necessary constants for PCI/IMS support:
- A new bus token for MSI irqdomain identification
- A MSI feature flag for the MSI irqdomains to signal support
- A secondary domain id
The latter expands the device internal domain pointer storage array from 1
to 2 entries. That extra pointer is mostly unused today, but the
alternative solutions would not be free either and would introduce more
complexity all over the place. Trade the 8bytes for simplicity.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221124232326.846169830@linutronix.de
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